1. Field of the Invention
The present invention relates to a system for mounting a relatively large semiconductor chip to a support such as a heat sink.
2. Description of the Prior Art
Semiconductor die or "chips" are normally formed in multiples in a silicon wafer which is about 5 inches in diameter. The wafer is then cut into individual chips, usually no larger than about 50 square millimeters, each of which contains a large number of electronic circuit elements. Logic chips which perform arithmetic computation functions, for example the function of addition, are now in production which have more than 40,000 transistors and other circuit elements in a 50 square millimeter area.
Even with the large number of functions which can be accommodated on a single chip, a large number of such chips are required in computing systems with significant capacity. Overall system speed is limited by the necessity of transmitting signals between logic circuits on different chips, and it would be desirable to increase the size of the individual chips to reduce the number of chip-to-chip communications, and thus increase system speed. Large size chips have not been effectively implemented for a variety of reasons, among which is the difficulty in adequately mounting such a chip to a supporting structure. Such difficulties are multiplied when the size of the chips is increased to "wafer-scale" having dimensions on the order of 60.times.60 millimeters.
Semiconductor chips are typically mounted to a supporting structure by solder. Before soldering, the chip is prepared by metallizing the back surface of the chip with a several thousand Angstrom layer of gold, or by a thin layer of chromium followed by the gold layer. The metallized chip is heat treated, and the gold layer partially reacts with the silicon to form a gold/silicon eutectic. Upon soldering, the gold and chromium layers are leached (dissolved) into the solder, and the solder attaches directly to the silicon chip through the gold/silicon eutectic.
Soldering of the chip to the support in the conventional fashion results in voids in the solder which contain trapped ambient gas from the soldering environment, usually air. The chip is typically moved back and forth while the solder is molten to reduce such voids, and mechanical brushing techniques have also been tried to distribute the solder and eliminate the trapped gas. However, even when great care is taken to make the soldering attachment of a 50 square millimeter chip, about 20% or more of the volume between the chip and the support typically constitute gas-filled voids in the solder.
Conventional solder attachment techniques are insufficient to properly mount a wafer scale chip. A wafer scale chip requires positive cooling, such as by mounting the chip directly to a heat sink, because of the heat generated by the large number of circuits. The gas-filled voids in a conventional soldered connection to a heat sink result in "hot spots" because the gas in the voids is a thermal insulator. Such a hot spot in a critical position could destroy the chip. Furthermore, it is not possible as a practical matter to apply mechanical brushing techniques or movement techniques to chips having wafer scale dimensions because such chips must be extremely accurately positioned on the support. Also, conventional soldering techniques utilize a solder which melts and then refreezes at a temperature of about 370.degree. C., and thermal mismatch between the support and the chip would be such during cooling from 370.degree. C. to room temperature for a chip of wafer dimensions that the delicate semiconductor chip may be fractured.